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 Post subject: ME227 Help!
PostPosted: Tue 06-15-2004 8:30AM 
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Private

Joined: Tue 06-15-2004 8:22AM
Posts: 4

Source: CivilE Building
I am in ME227 w/ Dr. Wan and was wondering if anyone knows anything about this subject or has any files.


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 Post subject:
PostPosted: Tue 06-15-2004 4:07PM 
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Corporal

Joined: Tue 04-16-2002 9:07AM
Posts: 8

Source: Off Campus
He sucks ass.

His teaching isn't too bad. Just do the homwork, and make sure you write down all his notes on the board.

But, at least with our semester, he grades with 6 quizes each 10%, and final 40%. He also doesn't believe in giving any of the tests or quiizzes back. You could go look at them during his office hours, which I could never really go to. Over all, that was the biggest chunk of BS.

He also only gave out homework answers, no solutions, and did not really like to answer questions on the homework.

But, you do get a cheat sheet for the quizes, so make sure you use it. It also seemed like the final is almost a duplicate of all the quizes, so if you don't know how to do something on the quiz, figure it out.

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 Post subject: Re: Verilog help
PostPosted: Tue 03-31-2009 10:34PM 
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Sergeant

Joined: Sun 08-28-2005 1:24PM
Posts: 41

Source: Fidelity
That's actually one of the first things I tried. Also tried to change the blocking calls ('=') into non-blocking calls ('<='). Even attempted to use a secondary register to indirectly change the output...

Code:
module test(clk);

output clk;

wire clk;
reg a;

assign clk = a;

initial begin
a <= 0;
end

always begin
#5;
a<=1;
#15;
a<=0;
end

endmodule


still no improvement, but thanks for the try.

I was able to introduce delay through a drawn-out method that involves a counter, but that requires more resources and isn't as simple to implement so I would still like guidance concerning the wait/delay operations.


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